1. Technical Field
The present invention relates generally to controlling electrical characteristics associated with input/output (I/O) circuits, and more particularly, to observing, testing, and adjusting the settings of an I/O circuit such as an output driver to account for variations in fabrication process, supply voltage, and/or temperature (PVT) conditions.
2. Prior Art
I/O circuits are used to interface traditional circuitry such as integrated circuits (ICs) with electrical environments external to the IC. An I/O circuit acts as a driver for signals generated by the IC and provides these signals to a pad, which, in turn, interfaces with the external electrical environment. In addition or alternatively, an I/O circuit may receive signals from the external electrical environment through the pad. A critical challenge in the design, fabrication, and operation of these I/O circuits is that their electrical characteristics, e.g., impedances, voltages, and rise and fall times of waveforms, may vary depending on the particular PVT conditions, thereby causing timing and/or noise problems (such as overshoot and undershoot).
In order to create independence between the electrical characteristics of the I/O circuits and PVT conditions, it is desirable that the slew rate, i.e., the change in pad voltage with rise time/fall time, be relatively constant. In other words, the transient current drive of the I/O circuit should be independent of the PVT conditions.
With reference now to FIG. 1, a block diagram of one typical prior art solution for keeping the slew rate of an I/O circuit independent of PVT conditions is illustrated. As shown, an exemplary output driver system 100 includes internal logic 106, an output driver 104, and a PVT sensing circuit 102. The internal logic 106 provides an input signal to the output driver 104, which, in turn, drives the input signal to provide a corresponding output signal. The drive strength of the output driver 104 is adjustable, so as to allow for PVT compensation. The PVT compensation is achieved by providing a six-bit control signal to the output driver 104, where the control signal consists of three coarse bits (C[2:0]) and three fine bits (F[2:0]). These six bits, which represent a linear range with uniform increments, selectively activate one or more of a plurality of leg circuits in the output driver 104 to vary the drive strength. In the system 100 of FIG. 1, the PVT sensing circuit 102 senses the current at an external reference resistor 108 to characterize the PVT conditions, determines an appropriate PVT compensation amount in real time, and generates a corresponding six-bit control signal, which it provides to the output driver 104 so that the output driver 104 can vary its drive strength accordingly. Depending on the application, the output driver system 100 might not include a PVT sensing circuit 102 at all. In this scenario, instead of utilizing a PVT sensing circuit to provide the six-bit control signal, a stored control signal would be provided to the output driver 104 from a six-bit control register (not shown).